On Tue, 2007-07-24 at 10:24 -0700, Linus Torvalds wrote:
>
> On Tue, 24 Jul 2007, Benjamin Herrenschmidt wrote:
> >
> > In fact, it's more than that... the bitops that return a value are often
> > used to have hand-made spinlock semantics. I'm sure we would get funky
> > bugs if loads or stores leaked out of the locked region. I think a full
> > "memory" clobber should be kept around for those cases.
>
> Not helpful.
>
> The CPU ordering constraints for "test_and_set_bit()" and friends are weak
> enough that even if you have a full memory clobber, it still wouldn't work
> as a lock.
>
> That's exactly why we have smp_mb__after_set_bit() and friends. On some
> architectures (arm, mips, parsic, powerpc), *that* is where the CPU memory
> barrier is, because the "test_and_set_bit()" itself is just a
> cache-coherent operation, not an actual barrier.
That's not what the Documentation/memory-barriers.txt states:
Any atomic operation that modifies some state in memory and returns
information
about the state (old or new) implies an SMP-conditional general memory
barrier
(smp_mb()) on each side of the actual operation. These include:
.....
test_and_set_bit();
test_and_clear_bit();
test_and_change_bit();
...
Trond
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to [EMAIL PROTECTED]
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
