Provide a higher priority to be used for pseudo-NMIs. When such an
interrupt is received, keep interrupts fully disabled at CPU level to
prevent receiving other pseudo-NMIs while handling the current one.

Signed-off-by: Julien Thierry <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Marc Zyngier <[email protected]>
---
 drivers/irqchip/irq-gic-v3.c | 42 ++++++++++++++++++++++++++++++++++++------
 1 file changed, 36 insertions(+), 6 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index f833842..b9a00364 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -41,6 +41,8 @@
 
 #include "irq-gic-common.h"
 
+#define GICD_INT_NMI_PRI       (GICD_INT_DEF_PRI & ~0x80)
+
 struct redist_region {
        void __iomem            *redist_base;
        phys_addr_t             phys_base;
@@ -375,12 +377,45 @@ static u64 gic_mpidr_to_affinity(unsigned long mpidr)
        return aff;
 }
 
+static inline void gic_deactivate_unexpected_irq(u32 irqnr)
+{
+       if (static_branch_likely(&supports_deactivate_key)) {
+               if (irqnr < 8192)
+                       gic_write_dir(irqnr);
+       } else {
+               gic_write_eoir(irqnr);
+       }
+}
+
+static inline void gic_handle_nmi(u32 irqnr, struct pt_regs *regs)
+{
+       int err;
+
+       if (static_branch_likely(&supports_deactivate_key))
+               gic_write_eoir(irqnr);
+       /*
+        * Leave the PSR.I bit set to prevent other NMIs to be
+        * received while handling this one.
+        * PSR.I will be restored when we ERET to the
+        * interrupted context.
+        */
+       err = handle_domain_nmi(gic_data.domain, irqnr, regs);
+       if (err)
+               gic_deactivate_unexpected_irq(irqnr);
+}
+
 static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs 
*regs)
 {
        u32 irqnr;
 
        irqnr = gic_read_iar();
 
+       if (gic_supports_nmi() &&
+               unlikely(gic_read_rpr() == GICD_INT_NMI_PRI)) {
+               gic_handle_nmi(irqnr, regs);
+               return;
+       }
+
        if (gic_prio_masking_enabled()) {
                gic_pmr_mask_irqs();
                gic_arch_enable_irqs();
@@ -397,12 +432,7 @@ static asmlinkage void __exception_irq_entry 
gic_handle_irq(struct pt_regs *regs
                err = handle_domain_irq(gic_data.domain, irqnr, regs);
                if (err) {
                        WARN_ONCE(true, "Unexpected interrupt received!\n");
-                       if (static_branch_likely(&supports_deactivate_key)) {
-                               if (irqnr < 8192)
-                                       gic_write_dir(irqnr);
-                       } else {
-                               gic_write_eoir(irqnr);
-                       }
+                       gic_deactivate_unexpected_irq(irqnr);
                }
                return;
        }
-- 
1.9.1

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