From:   Doug Thompson <[EMAIL PROTECTED]>

EDAC has a foundation to perform software memory scrubbing, but it
requires a per architecture (atomic_scrub) function for performing an atomic
update operation.  Under X86, this is done with a 

lock:  add  [addr],0

in the file asm-x86/edac.h

This patch provides the MIPS arch with that atomic function, atomic_scrub() in

asm-mips/edac.h

Cc:             Alan Cox <[EMAIL PROTECTED]>
Cc:             Ralf Baechle <[EMAIL PROTECTED]>
Signed-off-by:  Doug Thompson <[EMAIL PROTECTED]>
---
 edac.h |   35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

Index: linux-2.6.23-rc1/include/asm-mips/edac.h
===================================================================
--- /dev/null
+++ linux-2.6.23-rc1/include/asm-mips/edac.h
@@ -0,0 +1,35 @@
+#ifndef ASM_EDAC_H
+#define ASM_EDAC_H
+
+/* ECC atomic, DMA, SMP and interrupt safe scrub function */
+
+static __inline__ void atomic_scrub(void *va, u32 size)
+{
+       unsigned long *virt_addr = va;
+       unsigned long temp;
+       u32 i;
+
+       for (i = 0; i < size / sizeof(unsigned long); i++, virt_addr++) {
+
+               /*
+                * Very carefully read and write to memory atomically
+                * so we are interrupt, DMA and SMP safe.
+                *
+                * Intel: asm("lock; addl $0, %0"::"m"(*virt_addr));
+                */
+
+               __asm__ __volatile__ (
+               "       .set    mips3                                   \n"
+               "1:     ll      %0, %1          # atomic_add            \n"
+               "       ll      %0, %1          # atomic_add            \n"
+               "       addu    %0, $0                                  \n"
+               "       sc      %0, %1                                  \n"
+               "       beqz    %0, 1b                                  \n"
+               "       .set    mips0                                   \n"
+               : "=&r" (temp), "=m" (*virt_addr)
+               : "m" (*virt_addr));
+
+       }
+}
+
+#endif
-
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