The minimum value of bits arm defines for timer value is 56bits, add a new macro ARCH_TIMER_NBITS to use it in code instead of hardcoding 56.
Signed-off-by: Pavel Tatashin <[email protected]> --- drivers/clocksource/arm_arch_timer.c | 8 ++++---- include/clocksource/arm_arch_timer.h | 3 +++ 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 9a7d4dc00b6e..e4843ad48bd3 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -175,13 +175,13 @@ static struct clocksource clocksource_counter = { .name = "arch_sys_counter", .rating = 400, .read = arch_counter_read, - .mask = CLOCKSOURCE_MASK(56), + .mask = CLOCKSOURCE_MASK(ARCH_TIMER_NBITS), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; static struct cyclecounter cyclecounter __ro_after_init = { .read = arch_counter_read_cc, - .mask = CLOCKSOURCE_MASK(56), + .mask = CLOCKSOURCE_MASK(ARCH_TIMER_NBITS), }; struct ate_acpi_oem_info { @@ -963,8 +963,8 @@ static void __init arch_counter_register(unsigned type) timecounter_init(&arch_timer_kvm_info.timecounter, &cyclecounter, start_count); - /* 56 bits minimum, so we assume worst case rollover */ - sched_clock_register(arch_timer_read_counter, 56, arch_timer_rate); + sched_clock_register(arch_timer_read_counter, ARCH_TIMER_NBITS, + arch_timer_rate); } static void arch_timer_stop(struct clock_event_device *clk) diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 349e5957c949..c485512e1d01 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -71,6 +71,9 @@ enum arch_timer_spi_nr { #define ARCH_TIMER_EVT_STREAM_FREQ \ (USEC_PER_SEC / ARCH_TIMER_EVT_STREAM_PERIOD_US) +/* 56 bits minimum, so we assume worst case rollover */ +#define ARCH_TIMER_NBITS 56 + struct arch_timer_kvm_info { struct timecounter timecounter; int virtual_irq; -- 2.20.1
