[+cc Alex, Bharat, LKML]

Hi James,

Thanks for finding this issue and for the patch.

Is there any chance you have a PCIe analyzer and could investigate
what's going on at that level?  The bus reset should be fairly similar
to what happens on a cold boot, and obviously *that* works, so I
wonder if we can figure out what the difference here is.

If this is actually broken somehow in the hardware, can you dig up a
hardware erratum and include a URL here?

If there's any chance we could fix or work around this in the kernel,
I'd rather do that than extend this quirk to more devices.

FWIW, here's a similar report, which hasn't been resolved yet:
https://lore.kernel.org/linux-pci/20181127083454.26560-1-bharat.bhus...@nxp.com

On Mon, Jan 07, 2019 at 01:32:48PM -0800, James Prestwood wrote:
> This card has similar issues with bus reset as the others present in
> this list.
> 
> Signed-off-by: James Prestwood <james.prestw...@linux.intel.com>
> ---
>  drivers/pci/quirks.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index ef7143a274e0..d9d4a95b0309 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -3379,6 +3379,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, 
> quirk_no_bus_reset);
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset);
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset);
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, quirk_no_bus_reset);
>  
>  /*
>   * Root port on some Cavium CN8xxx chips do not successfully complete a bus
> -- 
> 2.17.1
> 

Reply via email to