Hi,

* min....@mediatek.com <min....@mediatek.com> [190117 07:16]:
> There are some quirk of MediaTek musb controller, such as:
>  -W1C interrupt status registers
>  -Private data toggle registers
>  -No dedicated DMA interrupt line

Can you please separate the musb generic changes listed above
into separate individual patches in preparation for adding
support for new hardware?

Otherwise we'll have hard time finding out with git bisect what
exactly breaks things if we run into trouble.

Regards,

Tony

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