Fix up the lpasscc address and size, missed during the conversion to address- and size-cells of 2.
Reported-by: Doug Anderson <diand...@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.anders...@linaro.org> --- This goes ontop of my pull request to Andy available until it's picked up at: https://github.com/andersson/kernel/commits/for-andy/arm64-for-5.1 arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index e4156ea320aa..920bdb03a9db 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2031,7 +2031,7 @@ lpasscc: clock-controller@17014000 { compatible = "qcom,sdm845-lpasscc"; - reg = <0x17014000 0x1f004>, <0x17300000 0x200>; + reg = <0 0x17014000 0 0x1f004>, <0 0x17300000 0 0x200>; reg-names = "cc", "qdsp6ss"; #clock-cells = <1>; status = "disabled"; -- 2.18.0
