Quoting Abel Vesa (2019-01-18 04:54:13)
> Before multiplying by PLL_FRAC_DENOM, the temp64 needs to be
> temp64 = rate * 2 - divfi * parent_rate * 8, instead of:
> temp64 = (rate * 2 - divfi) * parent_rate
>
> Fixes: 6209624b9a5c1e ("clk: imx: Add fractional PLL output clock")
> Signed-off-by: Abel Vesa <[email protected]>
> ---Applied to clk-fixes
