On Thu, 31 Jan 2019 16:15:28 +0000
<tudor.amba...@microchip.com> wrote:
> From: Tudor Ambarus <tudor.amba...@microchip.com>
>
> Cache MR value to avoid write access when setting the controller
> in Serial Memory Mode (SMM). SMM is set in exec_op() and not at
> probe time, to let room for future regular SPI support.
>
> Signed-off-by: Tudor Ambarus <tudor.amba...@microchip.com>
> ---
> v2: cache MR value instead of moving the write access at probe
>
> drivers/spi/atmel-quadspi.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c
> index ddc712410812..fe05aee5d845 100644
> --- a/drivers/spi/atmel-quadspi.c
> +++ b/drivers/spi/atmel-quadspi.c
> @@ -155,6 +155,7 @@ struct atmel_qspi {
> struct clk *clk;
> struct platform_device *pdev;
> u32 pending;
> + u32 mr;
> struct completion cmd_completion;
> };
>
> @@ -238,7 +239,9 @@ static int atmel_qspi_exec_op(struct spi_mem *mem, const
> struct spi_mem_op *op)
> icr = QSPI_ICR_INST(op->cmd.opcode);
> ifr = QSPI_IFR_INSTEN;
>
> - qspi_writel(aq, QSPI_MR, QSPI_MR_SMM);
> + /* Set the QSPI controller in Serial Memory Mode */
> + if (!(aq->mr & QSPI_MR_SMM))
if (aq->mr != QSPI_MR_SMM)
> + qspi_writel(aq, QSPI_MR, QSPI_MR_SMM);
You need to update ->mr here.
>
> mode = find_mode(op);
> if (mode < 0)
