On Fri, Feb 01, 2019 at 09:46:15PM +0900, Takao Indoh wrote: > From: Takao Indoh <indou.ta...@fujitsu.com> > > Fujitsu A64FX processor has a feature to accelerate data transfer of > internal bus by relaxed ordering. It is enabled when the bit 56 of dma > address is set to 1.
Wait, what? RO is a standard PCIe TLP attribute. Why would we need this?