On Sun, Feb 03, 2019 at 11:56:26PM +0800, Chen-Yu Tsai wrote: > Some H5 boards seem to not have proper trace lengths for eMMC to be able > to use the default setting for the delay chains under HS-DDR mode. These > include the Bananapi M2+ H5 and NanoPi NEO Core2. However the Libre > Computer ALL-H3-CC-H5 works just fine. > > For the H5 (at least for now), default to not enabling HS-DDR modes in > the driver, and expect the device tree to signal HS-DDR capability on > boards that work. > > Reported-by: Chris Blake <[email protected]> > Fixes: 07bafc1e3536 ("mmc: sunxi: Use new timing mode for A64 eMMC > controller") > Cc: <[email protected]> > Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]> Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
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