From: Bartosz Golaszewski <bgolaszew...@baylibre.com>

We now have a proper clocksource driver for davinci. Switch the platform
to using it.

Signed-off-by: Bartosz Golaszewski <bgolaszew...@baylibre.com>
---
 arch/arm/mach-davinci/dm646x.c | 36 ++++++++++++++++++++++------------
 1 file changed, 23 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 73a0f0226017..5058be123dbe 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -27,7 +27,8 @@
 #include <mach/irqs.h>
 #include <mach/mux.h>
 #include <mach/serial.h>
-#include <mach/time.h>
+
+#include <clocksource/timer-davinci.h>
 
 #include "asp.h"
 #include "davinci.h"
@@ -498,16 +499,24 @@ static struct davinci_id dm646x_ids[] = {
        },
 };
 
-/*
- * T0_BOT: Timer 0, bottom:  clockevent source for hrtimers
- * T0_TOP: Timer 0, top   :  clocksource for generic timekeeping
- * T1_BOT: Timer 1, bottom:  (used by DSP in TI DSPLink code)
- * T1_TOP: Timer 1, top   :  <unused>
- */
-static struct davinci_timer_info dm646x_timer_info = {
-       .timers         = davinci_timer_instance,
-       .clockevent_id  = T0_BOT,
-       .clocksource_id = T0_TOP,
+static const struct davinci_timer_cfg dm646x_timer_cfg = {
+       .reg = {
+               .start          = DAVINCI_TIMER0_BASE,
+               .end            = DAVINCI_TIMER0_BASE + SZ_4K,
+               .flags          = IORESOURCE_MEM,
+       },
+       .irq = {
+               {
+                       .start  = IRQ_TINT0_TINT12,
+                       .end    = IRQ_TINT0_TINT12,
+                       .flags  = IORESOURCE_IRQ,
+               },
+               {
+                       .start  = IRQ_TINT0_TINT34,
+                       .end    = IRQ_TINT0_TINT34,
+                       .flags  = IORESOURCE_IRQ,
+               }
+       }
 };
 
 static struct plat_serial8250_port dm646x_serial0_platform_data[] = {
@@ -589,7 +598,6 @@ static const struct davinci_soc_info 
davinci_soc_info_dm646x = {
        .intc_type              = DAVINCI_INTC_TYPE_AINTC,
        .intc_irq_prios         = dm646x_default_priorities,
        .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
-       .timer_info             = &dm646x_timer_info,
        .emac_pdata             = &dm646x_emac_pdata,
        .sram_dma               = 0x10010000,
        .sram_len               = SZ_32K,
@@ -654,6 +662,7 @@ void __init dm646x_init_time(unsigned long ref_clk_rate,
 {
        void __iomem *pll1, *psc;
        struct clk *clk;
+       int rv;
 
        clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, ref_clk_rate);
        clk_register_fixed_rate(NULL, "aux_clkin", NULL, 0, aux_clkin_rate);
@@ -670,7 +679,8 @@ void __init dm646x_init_time(unsigned long ref_clk_rate,
                return;
        }
 
-       davinci_timer_init(clk);
+       rv = davinci_timer_register(clk, &dm646x_timer_cfg);
+       WARN(rv, "Unable to register the timer: %d\n", rv);
 }
 
 static struct resource dm646x_pll2_resources[] = {
-- 
2.20.1

Reply via email to