On Tue, 12 Feb 2019 10:38:18 +0000,
Bartosz Golaszewski <[email protected]> wrote:
> 
> From: Bartosz Golaszewski <[email protected]>
> 
> I've been unable to figure out exactly why, but it seems that the
> IRQ_TINT1_TINT34 interrupt for timer 1 needs to be handled as a
> level irq, not edge like all others.
> 
> Let's move the handler setup out of the aintc driver where it's lived
> since the beginning and into the dm* SoC-specific files where it
> belongs.
> 
> Signed-off-by: Bartosz Golaszewski <[email protected]>
> ---
>  arch/arm/mach-davinci/dm355.c  | 8 ++++++++
>  arch/arm/mach-davinci/dm365.c  | 8 ++++++++
>  arch/arm/mach-davinci/dm644x.c | 8 ++++++++
>  arch/arm/mach-davinci/dm646x.c | 8 ++++++++
>  arch/arm/mach-davinci/irq.c    | 3 ---
>  5 files changed, 32 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
> index c7cd765114af..a732f2ea1d9a 100644
> --- a/arch/arm/mach-davinci/dm355.c
> +++ b/arch/arm/mach-davinci/dm355.c
> @@ -15,6 +15,7 @@
>  #include <linux/dma-mapping.h>
>  #include <linux/dmaengine.h>
>  #include <linux/init.h>
> +#include <linux/irq.h>
>  #include <linux/irqchip/irq-davinci-aintc.h>
>  #include <linux/platform_data/edma.h>
>  #include <linux/platform_data/gpio-davinci.h>
> @@ -744,6 +745,13 @@ void __init dm355_init_time(void)
>       psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
>       dm355_psc_init(NULL, psc);
>  
> +     /*
> +      * Nobody knows why anymore, but this interrupt has been handled as
> +      * a level irq from the very beginning of davinci support in mainline
> +      * linux.
> +      */
> +     irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
> +

I've said it on v2, I'm repeating it on v3. There is no point in
duplicating this pointless hack on and on again. If there is a driver
using this interrupt, move the setup there, and fix the irq_set_type
callback.

If nothing is using it, remove it altogether.

Thanks,

        M.

-- 
Jazz is not dead, it just smell funny.

Reply via email to