Hello Claudiu, On Mon, Jan 21, 2019 at 12:30:53PM +0000, claudiu.bez...@microchip.com wrote: > From: Claudiu Beznea <claudiu.bez...@microchip.com> > > New SAM9X60's PWM controller use 32 bits counters thus it could generate > signals with higher period and duty cycles. Update the current driver > to work with old controller (that uses 16 bits counters) and with the > new SAM9X60's controller. > > Signed-off-by: Claudiu Beznea <claudiu.bez...@microchip.com> > --- > drivers/pwm/pwm-atmel.c | 38 +++++++++++++++++++++++++++----------- > 1 file changed, 27 insertions(+), 11 deletions(-) > > diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c > index 7e86a5266eb6..44f4a1c9f60b 100644 > --- a/drivers/pwm/pwm-atmel.c > +++ b/drivers/pwm/pwm-atmel.c > @@ -48,15 +48,15 @@ > #define PWMV2_CPRD 0x0C > #define PWMV2_CPRDUPD 0x10 > > -/* > - * Max value for duty and period > - * > - * Although the duty and period register is 32 bit, > - * however only the LSB 16 bits are significant. > - */ > -#define PWM_MAX_DTY 0xFFFF > -#define PWM_MAX_PRD 0xFFFF > -#define PRD_MAX_PRES 10 > +/* Max values for period and prescaler */ > + > +/* Only the LSB 16 bits are significant. */ > +#define PWM_MAXV1_PRD 0xFFFF > + > +/* All 32 bits are significant. */ > +#define PWM_MAXV2_PRD 0xFFFFFFFF
This symbol is unused, so I wonder if the patch really does what the commit log promises. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ |
