On Wed, Jan 23, 2019 at 2:46 PM Nava kishore Manne <na...@xilinx.com> wrote:
>
> Hi Rob,
>
>
>
> Thanks for providing the comments...

Please fix your mailer to send plain text emails to mail lists.


> > -----Original Message-----
>
> > From: Rob Herring [mailto:r...@kernel.org]
>
> > Sent: Monday, January 21, 2019 9:19 PM
>
> > To: Nava kishore Manne <na...@xilinx.com>
>
> > Cc: mark.rutl...@arm.com; Michal Simek <mich...@xilinx.com>; Rajan Vaja
>
> > <raj...@xilinx.com>; linux-arm-ker...@lists.infradead.org; linux-
>
> > ker...@vger.kernel.org; devicet...@vger.kernel.org; Jolly Shah
>
> > <jol...@xilinx.com>; chinnikishore...@gmail.com
>
> > Subject: Re: [PATCH v3 6/6] dt-bindings: fpga: Add bindings for ZynqMP fpga
>
> > driver
>
> >
>
> > On Mon, Jan 21, 2019 at 11:08:35PM +0530, Nava kishore Manne wrote:
>
> > > Add documentation to describe Xilinx ZynqMP fpga driver bindings.
>
> > >
>
> > > Signed-off-by: Nava kishore Manne <nava.ma...@xilinx.com>
>
> > > ---
>
> > > Changes for v3:
>
> > >                         -Removed PCAP as a child node to the FW and 
> > > Created
>
> > >                         an independent node since PCAP driver is a 
> > > consumer
>
> > >                         not a provider.
>
> > >
>
> > >  .../bindings/fpga/xlnx,zynqmp-pcap-fpga.txt         | 13 +++++++++++++
>
> > >  1 file changed, 13 insertions(+)
>
> > >  create mode 100644
>
> > > Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
>
> > >
>
> > > diff --git
>
> > > a/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
>
> > > b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
>
> > > new file mode 100644
>
> > > index 000000000000..1f6f58872311
>
> > > --- /dev/null
>
> > > +++ b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
>
> > > @@ -0,0 +1,13 @@
>
> > > +Device Tree zynqmp-fpga bindings for the Zynq Ultrascale+ MPSoC
>
> > > +controlled using ZynqMP SoC firmware interface For Bitstream
>
> > > +configuration on ZynqMp Soc uses processor configuration
>
> > > +port(PCAP) to configure the programmable logic(PL) through PS by
>
> > > +using FW interface.
>
> > > +
>
> > > +Required properties:
>
> > > +- compatible: should contain "xlnx,zynqmp-pcap-fpga"
>
> > > +
>
> > > +Example:
>
> > > +      zynqmp_pcap: pcap {
>
> > > +                     compatible = "xlnx,zynqmp-pcap-fpga";
>
> > > +      };
>
> >
>
> > There's no need for a DT node. Just make the firware driver create a 
> > platform
>
> > device for pcap.
>
> >
>
>
>
> This driver being used by the FPGA manager framework(fpga-region) to apply 
> overlay's so this node is needed AFAIK.

The binding says nothing about child nodes and what they are. Please
define that.

Rob

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