This sets the pin configuration for SAI pins BLCK/MCLK/FSYNC/DATA.
GPIO_01 is used for mute.

Signed-off-by: Daniel Baluta <daniel.bal...@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts 
b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 54737bf1772f..d21ee2a5312c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -223,6 +223,16 @@
                >;
        };
 
+       pinctrl_sai2: sai2grp {
+               fsl,pins = <
+                       MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC     0xd6
+                       MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK      0xd6
+                       MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK        0xd6
+                       MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0    0xd6
+                       MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8       0xd6
+               >;
+       };
+
        pinctrl_i2c1: i2c1grp {
                fsl,pins = <
                        MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL                  
0x4000007f
-- 
2.17.1

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