[PATCH 3/8] misc: fastrpc: make sure memory read and writes are visible

[Srinivas Kandagatla]

dma_alloc_coherent buffers could have writes queued in store buffers so
commit them before sending buffer to DSP using correct dma barriers.
Same with vice-versa.

Fixes: c68cfb718c8f ("misc: fastrpc: Add support for context Invoke method")
Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org>
---
 drivers/misc/fastrpc.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c
index 8fbcc607a77e..753d62ceb1fb 100644
--- a/drivers/misc/fastrpc.c
+++ b/drivers/misc/fastrpc.c
@@ -792,6 +792,9 @@ static int fastrpc_internal_invoke(struct fastrpc_user *fl, 
 u32 kernel,
                if (err)
                        goto bail;
        }
+
+       /* make sure that all CPU memory writes are seen by DSP */
+       dma_wmb();
        /* Send invoke buffer to remote dsp */
        err = fastrpc_invoke_send(fl->sctx, ctx, kernel, handle);
        if (err)
@@ -808,6 +811,8 @@ static int fastrpc_internal_invoke(struct fastrpc_user *fl, 
 u32 kernel,
                goto bail;
 
        if (ctx->nscalars) {
+               /* make sure that all memory writes by DSP are seen by CPU */
+               dma_rmb();
                /* populate all the output buffers with results */
                err = fastrpc_put_args(ctx, kernel);
                if (err)
-- 
2.21.0