On Tue, Mar 12, 2019 at 02:38:46PM +0530, Vignesh Raghavendra wrote:
> From: Christoph Vogtländer <c.vogtlaen...@sigma-surface-science.com>
>
> It must be made sure that immediate mode is not already set, when
> modifying shadow register value in ehrpwm_pwm_disable(). Otherwise
> modifications to the action-qualifier continuous S/W force
> register(AQSFRC) will be done in the active register.
> This may happen when both channels are being disabled. In this case,
> only the first channel state will be recorded as disabled in the shadow
> register. Later, when enabling the first channel again, the second
> channel would be enabled as well. Setting RLDCSF to zero, first, ensures
> that the shadow register is updated as desired.
>
> Fixes: 38dabd91ff0b ("pwm: tiehrpwm: Fix disabling of output of PWMs")
> Signed-off-by: Christoph Vogtländer <c.vogtlaen...@sigma-surface-science.com>
> [vigne...@ti.com: Improve commit message]
> Signed-off-by: Vignesh Raghavendra <vigne...@ti.com>
> ---
> drivers/pwm/pwm-tiehrpwm.c | 2 ++
> 1 file changed, 2 insertions(+)Applied, thanks. Thierry
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