Hi Boris,

Any comments on this set?

Thanks,
Yazen

> -----Original Message-----
> From: [email protected] <[email protected]> On 
> Behalf Of Ghannam, Yazen
> Sent: Thursday, February 28, 2019 9:36 AM
> To: [email protected]
> Cc: Ghannam, Yazen <[email protected]>; [email protected]; 
> [email protected]
> Subject: [PATCH v3 1/6] EDAC/amd64: Add Family 17h Model 30h PCI IDs
> 
> From: Yazen Ghannam <[email protected]>
> 
> Add the new Family 17h Model 30h PCI IDs to the AMD64 EDAC module.
> 
> This also fixes a probe failure that appeared when some other PCI IDs
> for Family 17h Model 30h were added to the AMD NB code.
> 
> Fixes: be3518a16ef2 (x86/amd_nb: Add PCI device IDs for family 17h, model 30h)
> Signed-off-by: Yazen Ghannam <[email protected]>
> ---
> Link:
> https://lkml.kernel.org/r/[email protected]
> 
> v2->v3:
> * No change.
> 
> v1->v2:
> * Write out "Family" and "Model" in commit message.
> * Sort model checks in increasing order.
> 
>  drivers/edac/amd64_edac.c | 13 +++++++++++++
>  drivers/edac/amd64_edac.h |  3 +++
>  2 files changed, 16 insertions(+)
> 
> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> index 6ea98575a402..98e8da9d9f5b 100644
> --- a/drivers/edac/amd64_edac.c
> +++ b/drivers/edac/amd64_edac.c
> @@ -2211,6 +2211,15 @@ static struct amd64_family_type family_types[] = {
>                       .dbam_to_cs             = f17_base_addr_to_cs_size,
>               }
>       },
> +     [F17_M30H_CPUS] = {
> +             .ctl_name = "F17h_M30h",
> +             .f0_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F0,
> +             .f6_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F6,
> +             .ops = {
> +                     .early_channel_count    = f17_early_channel_count,
> +                     .dbam_to_cs             = f17_base_addr_to_cs_size,
> +             }
> +     },
>  };
> 
>  /*
> @@ -3203,6 +3212,10 @@ static struct amd64_family_type 
> *per_family_init(struct amd64_pvt *pvt)
>                       fam_type = &family_types[F17_M10H_CPUS];
>                       pvt->ops = &family_types[F17_M10H_CPUS].ops;
>                       break;
> +             } else if (pvt->model >= 0x30 && pvt->model <= 0x3f) {
> +                     fam_type = &family_types[F17_M30H_CPUS];
> +                     pvt->ops = &family_types[F17_M30H_CPUS].ops;
> +                     break;
>               }
>               /* fall through */
>       case 0x18:
> diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
> index 4242f8e39c18..de8dbb0b42b5 100644
> --- a/drivers/edac/amd64_edac.h
> +++ b/drivers/edac/amd64_edac.h
> @@ -117,6 +117,8 @@
>  #define PCI_DEVICE_ID_AMD_17H_DF_F6  0x1466
>  #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F0 0x15e8
>  #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F6 0x15ee
> +#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F0 0x1490
> +#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F6 0x1496
> 
>  /*
>   * Function 1 - Address Map
> @@ -284,6 +286,7 @@ enum amd_families {
>       F16_M30H_CPUS,
>       F17_CPUS,
>       F17_M10H_CPUS,
> +     F17_M30H_CPUS,
>       NUM_FAMILIES,
>  };
> 
> --
> 2.17.1

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