Ping!! > -----Original Message----- > From: Nava kishore Manne [mailto:[email protected]] > Sent: Thursday, March 14, 2019 7:31 PM > To: [email protected]; [email protected]; [email protected]; > [email protected]; Michal Simek <[email protected]>; Rajan Vaja > <[email protected]>; Jolly Shah <[email protected]>; Nava kishore Manne > <[email protected]>; [email protected]; [email protected]; > [email protected]; [email protected]; > [email protected] > Subject: [PATCH v4 6/6] dt-bindings: fpga: Add bindings for ZynqMP fpga driver > > Add documentation to describe Xilinx ZynqMP fpga driver bindings. > > Signed-off-by: Nava kishore Manne <[email protected]> > --- > Changes for v4: > -Modified binding description as suggested by Moritz Fischer. > Changes for v3: > -Removed PCAP as a child node to the FW and Created > an independent node since PCAP driver is a consumer > not a provider. > > .../bindings/fpga/xlnx,zynqmp-pcap-fpga.txt | 11 +++++++++++ > 1 file changed, 11 insertions(+) > create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,zynqmp- > pcap-fpga.txt > > diff --git a/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt > b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt > new file mode 100644 > index 000000000000..6d7f10775d9b > --- /dev/null > +++ b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt > @@ -0,0 +1,11 @@ > +Devicetree bindings for Zynq Ultrascale MPSoC FPGA Manager. > +The ZynqMP SoC uses the PCAP (Processor configuration Port) to > +configure the Programmable Logic (PL). The configuration uses the firmware > interface. > + > +Required properties: > +- compatible: should contain "xlnx,zynqmp-pcap-fpga" > + > +Example: > + zynqmp_pcap: pcap { > + compatible = "xlnx,zynqmp-pcap-fpga"; > + }; > -- > 2.18.0
