On Fri, Mar 22, 2019 at 4:00 PM Peter Zijlstra <[email protected]> wrote: > > On Thu, Mar 21, 2019 at 11:20:17PM +0100, Rafael J. Wysocki wrote: > > + ret = rdmsrl_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &epb); > > + if (ret < 0) > > + return ret; > > + > > + ret = wrmsrl_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, > > + (epb & ~EPB_MASK) | val); > > That's two back-to-back IPIs and a giant waste.
Giant with respect to what? I know that the read can be avoidable if more MSR bits are stored in memory, but I don't expect this i/f to be used very often (once per boot maybe or on AC<->DC changes at most), so I didn't think that this would be a good tradeoff. > If you'd use a proper msr shadow variable, you'd not have to do the > rdmsr_on_cpu :-) Not really. The MSR can be updated from elsewhere which is not controlled by this code.
