On Tue, Mar 26, 2019 at 03:30:50PM +0100, Randolph Maaßen wrote: > To transfer via SPI the tegra20-slink driver first sets the command > register, which contains the chip select value, and after that the > command2 register, which contains the chip select line. This leads to a > small spike in the chip selct 0 line between the set of the value and > the selection of the chip select line. > > This commit changes the order of the register writes so that first the > chip select line is chosen and then the value is set, removing the > spike. > > Signed-off-by: Randolph Maaßen <gai...@gaireg.de> > --- > drivers/spi/spi-tegra20-slink.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-)
With the typofix that Sowjanya pointed out, this patch is: Acked-by: Thierry Reding <tred...@nvidia.com>
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