[PATCH AUTOSEL 4.19 43/52] irqchip/mbigen: Don't clear eventid when freeing an MSI

[Sasha Levin]

From: Jianguo Chen <chenjiang...@huawei.com>

[ Upstream commit fca269f201a8d9985c0a31fb60b15d4eb57cef80 ]

mbigen_write_msg clears eventid bits of a mbigen register
when free a interrupt, because msi_domain_deactivate memset
struct msg to zero. Then multiple mbigen pins with zero eventid
will report the same interrupt number.

The eventid clear call trace:
                free_irq
                __free_irq
                irq_shutdown
                irq_domain_deactivate_irq
                __irq_domain_deactivate_irq
                __irq_domain_deactivate_irq
                msi_domain_deactivate
                platform_msi_write_msg
                mbigen_write_msg

Signed-off-by: Jianguo Chen <chenjiang...@huawei.com>
[maz: massaged subject]
Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 drivers/irqchip/irq-mbigen.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
index 567b29c47608..98b6e1d4b1a6 100644
--- a/drivers/irqchip/irq-mbigen.c
+++ b/drivers/irqchip/irq-mbigen.c
@@ -161,6 +161,9 @@ static void mbigen_write_msg(struct msi_desc *desc, struct 
msi_msg *msg)
        void __iomem *base = d->chip_data;
        u32 val;
 
+       if (!msg->address_lo && !msg->address_hi)
+               return;
+ 
        base += get_mbigen_vec_reg(d->hwirq);
        val = readl_relaxed(base);
 
-- 
2.19.1