Commit-ID: d7262457e35dbe239659e62654e56f8ddb814bed Gitweb: https://git.kernel.org/tip/d7262457e35dbe239659e62654e56f8ddb814bed Author: Peter Zijlstra <pet...@infradead.org> AuthorDate: Thu, 21 Mar 2019 13:38:49 +0100 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Wed, 3 Apr 2019 11:40:32 +0200
perf/x86/intel: Initialize TFA MSR Stephane reported that the TFA MSR is not initialized by the kernel, but the TFA bit could set by firmware or as a leftover from a kexec, which makes the state inconsistent. Reported-by: Stephane Eranian <eran...@google.com> Tested-by: Nelson DSouza <nelson.dso...@intel.com> Signed-off-by: Peter Zijlstra (Intel) <pet...@infradead.org> Cc: Alexander Shishkin <alexander.shish...@linux.intel.com> Cc: Arnaldo Carvalho de Melo <a...@redhat.com> Cc: Jiri Olsa <jo...@redhat.com> Cc: Linus Torvalds <torva...@linux-foundation.org> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Thomas Gleixner <t...@linutronix.de> Cc: Vince Weaver <vincent.wea...@maine.edu> Cc: to...@suse.com Link: https://lkml.kernel.org/r/20190321123849.gn6...@hirez.programming.kicks-ass.net Signed-off-by: Ingo Molnar <mi...@kernel.org> --- arch/x86/events/intel/core.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 1539647ea39d..f61dcbef20ff 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -3575,6 +3575,12 @@ static void intel_pmu_cpu_starting(int cpu) cpuc->lbr_sel = NULL; + if (x86_pmu.flags & PMU_FL_TFA) { + WARN_ON_ONCE(cpuc->tfa_shadow); + cpuc->tfa_shadow = ~0ULL; + intel_set_tfa(cpuc, false); + } + if (x86_pmu.version > 1) flip_smm_bit(&x86_pmu.attr_freeze_on_smi);
