On 3/28/2019 6:43 PM, Leonard Crestez wrote: > On Fri, 2019-03-22 at 16:49 +0000, Abel Vesa wrote: >> Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code. >> For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ >> revision it will print 'unknown'. > >> +#define REV_B1 0x21 >> + >> +#define IMX8MQ_SW_INFO_B1 0x40 >> +#define IMX8MQ_SW_MAGIC_B1 0xff0055aa >> + >> + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp");+ >> + ocotp_base = of_iomap(np, 0); >> + >> + magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1); >> + if (magic == IMX8MQ_SW_MAGIC_B1) >> + rev = REV_B1; > > This is based on ATF code in vendor tree, but shouldn't we have some > sort of explanation for this "magic"? > > Looking at the OCOTP driver reg 0x40 is IMX_OCOTP_ADDR_DATA2 and it's > used as part of fuse writes. According to the driver code 8mq is > compatible with 7d and this write path is enabled for imx8mq-ocotp.
After further digging in NXP manuals and uboot sources it seems that imx8mq ocotp is like imx6 rather than imx7. Posted fix for nvmem driver: https://patchwork.kernel.org/patch/10908081/ Reviewed-by: Leonard Crestez <leonard.cres...@nxp.com> It might still be nice to find a way to identify imx8mq B0.
