On Tue, 23 Apr 2019, Daniel Drake wrote:
> /* Default timer init function */
> void __init hpet_time_init(void)
> {
> - if (!hpet_enable())
> - setup_pit_timer();
> + if (hpet_enable()) {
> + setup_default_timer_irq();
> + return;
> + }
> +
> + /* Fall back on legacy 8253 PIT */
> + setup_pit_timer();
> setup_default_timer_irq();
> +
> + /*
> + * Intel SoCs like ApolloLake, Skylake and newer can have
> + * their PIT "gated" by the BIOS such that IRQ0 does not
> + * tick. Check for that situation here.
> + */
> + if (!irq0_timer_works()) {
So you rely on the fact that the legacy PIC delivery is working
here. That's fragile at best especially when this is a boot of a crash
kernel.
> + pr_info("HPET is not available, and 8253 timer is not working. "
> + "Continuing without IRQ0 timer.\n");
> + remove_default_timer_irq();
> + remove_pit_timer();
> + }
> +
> +void __init clockevent_i8253_exit(void)
> +{
> + clockevents_switch_state(&i8253_clockevent, CLOCK_EVT_STATE_DETACHED);
Smart, but broken. The PIT clockevent is still referenced in the
clockevents core code after the unbind. The unbind logic is there for a
reason and just because the above duct tape does not explode in your face
does not make it more correct. :)
> + clockevents_unbind_device(&i8253_clockevent, smp_processor_id());
We really want to avoid the whole register and whatever dance at all for
these devices. Let me think about it some more.
Thanks,
tglx
