NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as system controller(SCU), the ocotp controller is being controlled by the SCU, so Linux need use RPC to SCU for ocotp handling. This patch adds binding doc for i.MX8 SCU OCOTP driver.
Signed-off-by: Peng Fan <[email protected]> Cc: Rob Herring <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Aisheng Dong <[email protected]> Cc: Shawn Guo <[email protected]> Cc: Ulf Hansson <[email protected]> Cc: Stephen Boyd <[email protected]> Cc: Anson Huang <[email protected]> Cc: [email protected] --- Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt index 5d7dbabbb784..9cb7d52bdf26 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt @@ -100,6 +100,13 @@ ID in its "clocks" phandle cell. See the full list of clock IDs from: include/dt-bindings/clock/imx8qxp-clock.h +OCOTP bindings based on SCU Message Protocol +------------------------------------------------------------ +Required properties: +- compatible: Should be "fsl,imx8qxp-ocotp" +- #address-cells: Must be 1. Contains byte index +- #size-cells: Must be 1. Contains byte length + Pinctrl bindings based on SCU Message Protocol ------------------------------------------------------------ @@ -177,6 +184,12 @@ firmware { ... }; + ocotp: imx8qx-ocotp { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,imx8qxp-ocotp"; + }; + pd: imx8qx-pd { compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd"; #power-domain-cells = <1>; -- 2.16.4
