RE: [EXT] Re: [PATCH 1/2] i2c: imx: I2C Driver doesn't consider I2C_IPGCLK_SEL RCW bit when using ls1046a SoC

[Chuanhua Han]

> -----Original Message-----
> From: Sascha Hauer <s.ha...@pengutronix.de>
> Sent: 2019年5月6日 15:38
> To: Chuanhua Han <chuanhua....@nxp.com>
> Cc: shawn...@kernel.org; Leo Li <leoyang...@nxp.com>; robh...@kernel.org;
> mark.rutl...@arm.com; linux-kernel@vger.kernel.org;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> devicet...@vger.kernel.org; feste...@gmail.com; dl-linux-imx
> <linux-...@nxp.com>; wsa+rene...@sang-engineering.com;
> u.kleine-koe...@pengutronix.de; e...@deif.com; li...@rempel-privat.de;
> l.st...@pengutronix.de; p...@axentia.se; Sumit Batra
> <sumit.ba...@nxp.com>
> Subject: Re: [EXT] Re: [PATCH 1/2] i2c: imx: I2C Driver doesn't consider
> I2C_IPGCLK_SEL RCW bit when using ls1046a SoC
> 
> Caution: EXT Email
> 
> On Sat, May 04, 2019 at 09:28:48AM +0000, Chuanhua Han wrote:
> >
> >
> > > -----Original Message-----
> > > From: Sascha Hauer <s.ha...@pengutronix.de>
> > > Sent: 2019年4月30日 20:51
> > > To: Chuanhua Han <chuanhua....@nxp.com>
> > > Cc: shawn...@kernel.org; Leo Li <leoyang...@nxp.com>;
> > > robh...@kernel.org; mark.rutl...@arm.com;
> > > linux-kernel@vger.kernel.org; linux-...@vger.kernel.org;
> > > linux-arm-ker...@lists.infradead.org;
> > > devicet...@vger.kernel.org; feste...@gmail.com; dl-linux-imx
> > > <linux-...@nxp.com>; wsa+rene...@sang-engineering.com;
> > > u.kleine-koe...@pengutronix.de; e...@deif.com;
> > > li...@rempel-privat.de; l.st...@pengutronix.de; p...@axentia.se;
> > > Sumit Batra <sumit.ba...@nxp.com>
> > > Subject: [EXT] Re: [PATCH 1/2] i2c: imx: I2C Driver doesn't consider
> > > I2C_IPGCLK_SEL RCW bit when using ls1046a SoC
> > >
> > > Caution: EXT Email
> > >
> > > On Tue, Apr 30, 2019 at 12:47:18PM +0800, Chuanhua Han wrote:
> > > > The current kernel driver does not consider I2C_IPGCLK_SEL (424
> > > > bit of
> > > > RCW) in deciding  i2c_clk_rate in function i2c_imx_set_clk() { 0
> > > > Platform clock/4, 1 Platform clock/2}.
> > > >
> > > > When using ls1046a SoC, this populates incorrect value in IBFD
> > > > register if I2C_IPGCLK_SEL = 0, which generates half of the desired 
> > > > Clock.
> > > >
> > > > Therefore, if ls1046a SoC is used, we need to set the i2c clock
> > > > according to the corresponding RCW.
> > >
> > > So the clock driver reports the wrong clock. Please fix the clock driver 
> > > then.
> > No, this is a problem with the i2c driver. It is not a problem with
> > the clock driver, so the i2c driver needs to be modified.
> 
> So how does this RCW bit get evaluated? According to the reference manual
> only one clock goes to the i2c module (described as 1/2 Platform
> Clock) and the i2c module only takes one clock. So it seems there must be a /2
> divider somewhere, either in each i2c module or somewhere outside. Can your
> IC guys tell you where it is?
> 
> One reason I suggested the clock driver is that the clock driver contains SoC
> specific code already, so it should be easier to integrate there.
OK, I will see that it can be qualified in the clock driver.
> 
> Sascha
> 
> 
> --
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