From: Miquel Raynal <miquel.ray...@bootlin.com>

commit 9a8f612ca0d6a436e6471c9bed516d34a2cc626f upstream.

Since the migration of the driver to stop using the legacy
->select_chip() hook, there is nothing deselecting the target anymore,
thus the selection is not forced at the next access. Ensure the ND_RUN
bit and the interrupts are always in a clean state.

Cc: Daniel Mack <dan...@zonque.org>
Cc: sta...@vger.kernel.org
Fixes: b25251414f6e00 ("mtd: rawnand: marvell: Stop implementing 
->select_chip()")
Suggested-by: Boris Brezillon <boris.brezil...@collabora.com>
Signed-off-by: Miquel Raynal <miquel.ray...@bootlin.com>
Tested-by: Daniel Mack <dan...@zonque.org>
Reviewed-by: Boris Brezillon <boris.brezil...@collabora.com>
Signed-off-by: Richard Weinberger <rich...@nod.at>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>

---
 drivers/mtd/nand/raw/marvell_nand.c |   12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

--- a/drivers/mtd/nand/raw/marvell_nand.c
+++ b/drivers/mtd/nand/raw/marvell_nand.c
@@ -722,12 +722,6 @@ static void marvell_nfc_select_target(st
        struct marvell_nfc *nfc = to_marvell_nfc(chip->controller);
        u32 ndcr_generic;
 
-       if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die)
-               return;
-
-       writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0);
-       writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1);
-
        /*
         * Reset the NDCR register to a clean state for this particular chip,
         * also clear ND_RUN bit.
@@ -739,6 +733,12 @@ static void marvell_nfc_select_target(st
        /* Also reset the interrupt status register */
        marvell_nfc_clear_int(nfc, NDCR_ALL_INT);
 
+       if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die)
+               return;
+
+       writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0);
+       writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1);
+
        nfc->selected_chip = chip;
        marvell_nand->selected_die = die_nr;
 }


Reply via email to