[PATCH 5/5] ARM: dts: imx6sx-sdb: Assign corresponding power supply for LDOs

[Anson Huang]

On i.MX6SX SDB board, vgen6 supplies vdd1p1/vdd2p5 LDO and
sw2 supplies vdd3p0 LDO, this patch assigns corresponding power
supply for vdd1p1/vdd2p5/vdd3p0 to avoid confusion by below log:

vdd1p1: supplied by regulator-dummy
vdd3p0: supplied by regulator-dummy
vdd2p5: supplied by regulator-dummy

With this patch, the power supply is more accurate:

vdd1p1: supplied by VGEN6
vdd3p0: supplied by SW2
vdd2p5: supplied by VGEN6

Signed-off-by: Anson Huang <anson.hu...@nxp.com>
---
 arch/arm/boot/dts/imx6sx-sdb-reva.dts | 12 ++++++++++++
 arch/arm/boot/dts/imx6sx-sdb.dts      | 12 ++++++++++++
 arch/arm/boot/dts/imx6sx.dtsi         |  6 +++---
 3 files changed, 27 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/imx6sx-sdb-reva.dts 
b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
index 00c4854..5b3d6c10 100644
--- a/arch/arm/boot/dts/imx6sx-sdb-reva.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
@@ -154,3 +154,15 @@
        enable-active-high;
        vin-supply = <&reg_can_en>;
 };
+
+&reg_vdd1p1 {
+       vin-supply = <&vgen6_reg>;
+};
+
+&reg_vdd3p0 {
+       vin-supply = <&sw2_reg>;
+};
+
+&reg_vdd2p5 {
+       vin-supply = <&vgen6_reg>;
+};
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
index 998e3e1..10f6da8 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
@@ -137,6 +137,18 @@
        vin-supply = <&sw1a_reg>;
 };
 
+&reg_vdd1p1 {
+       vin-supply = <&vgen6_reg>;
+};
+
+&reg_vdd3p0 {
+       vin-supply = <&sw2_reg>;
+};
+
+&reg_vdd2p5 {
+       vin-supply = <&vgen6_reg>;
+};
+
 &reg_can_stby {
        /* Transceiver EN/STBY is active low on RevB board */
        gpio = <&gpio4 27 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index b16a123..bbdfdd8 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -600,7 +600,7 @@
                                             <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 
-                               regulator-1p1 {
+                               reg_vdd1p1: regulator-1p1 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd1p1";
                                        regulator-min-microvolt = <1000000>;
@@ -615,7 +615,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               regulator-3p0 {
+                               reg_vdd3p0: regulator-3p0 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd3p0";
                                        regulator-min-microvolt = <2800000>;
@@ -630,7 +630,7 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               regulator-2p5 {
+                               reg_vdd2p5: regulator-2p5 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd2p5";
                                        regulator-min-microvolt = <2250000>;
-- 
2.7.4