Hi Rasmus, On Wed, 8 May 2019 13:47:15 +0200, Andrew Lunn <[email protected]> wrote: > > > > > > This works, but i think i prefer adding mv88e6xxx_smi_dual_chip_write, > > > mv88e6xxx_smi_dual_chip_read, and create a > > > mv88e6xxx_smi_single_chip_ops. > > > > Now that Vivien's "net: dsa: mv88e6xxx: refine SMI support" is in > > master, do you still prefer introducing a third bus_ops structure > > (mv88e6xxx_smi_dual_direct_ops ?), or would the approach of adding > > chip->sw_addr in the smi_direct_{read/write} functions be ok (which > > would then require changing the indirect callers to pass 0 instead of > > chip->swaddr). > > I would still prefer a new bus_ops.
Even though those are direct read and write operations, having 3 mv88e6xxx_bus_ops structures will make it clear that there are 3 ways for accessible the internal switch registers through SMI, depending on the Marvell chip model. So I would prefer a third ops as well. Thanks, Vivien
