On 8/05/19 7:40 PM, Scott Branden wrote:
> From: Trac Hoang <trac.ho...@broadcom.com>
>
> The iproc host eMMC/SD controller hold time does not meet the
> specification in the HS50 mode. This problem can be mitigated
> by disabling the HISPD bit; thus forcing the controller output
> data to be driven on the falling clock edges rather than the
> rising clock edges.
You should add your stable comments as well i.e.
Scott chose this tag (v4.12+) to assist stable kernel maintainers so that
the change does not produce merge conflicts backporting to older kernel
versions. In reality, the timing bug existed since the driver was first
introduced but there is no need for this driver to be supported in kernel
versions that old.
>
> Cc: sta...@vger.kernel.org # v4.12+
> Signed-off-by: Trac Hoang <trac.ho...@broadcom.com>
> Signed-off-by: Scott Branden <scott.bran...@broadcom.com>
Acked-by: Adrian Hunter <adrian.hun...@intel.com>
> ---
> drivers/mmc/host/sdhci-iproc.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c
> index 9d4071c41c94..2feb4ef32035 100644
> --- a/drivers/mmc/host/sdhci-iproc.c
> +++ b/drivers/mmc/host/sdhci-iproc.c
> @@ -220,7 +220,8 @@ static const struct sdhci_iproc_data iproc_cygnus_data = {
>
> static const struct sdhci_pltfm_data sdhci_iproc_pltfm_data = {
> .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
> - SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
> + SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 |
> + SDHCI_QUIRK_NO_HISPD_BIT,
> .quirks2 = SDHCI_QUIRK2_ACMD23_BROKEN,
> .ops = &sdhci_iproc_ops,
> };
>
