Using the new pmu::update_attrs attribute group for
skylake specific format attributes.

Signed-off-by: Jiri Olsa <jo...@kernel.org>
---
 arch/x86/events/intel/core.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 524b390a2c26..7db858c3bbec 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4444,6 +4444,11 @@ static struct attribute_group group_format_extra = {
        .is_visible = exra_is_visible,
 };
 
+static struct attribute_group group_format_extra_skl = {
+       .name       = "format",
+       .is_visible = exra_is_visible,
+};
+
 static const struct attribute_group *attr_update[] = {
        &group_events_td,
        &group_events_mem,
@@ -4451,6 +4456,7 @@ static const struct attribute_group *attr_update[] = {
        &group_caps_gen,
        &group_caps_lbr,
        &group_format_extra,
+       &group_format_extra_skl,
        NULL,
 };
 
@@ -4458,11 +4464,11 @@ static struct attribute *empty_attrs;
 
 __init int intel_pmu_init(void)
 {
+       struct attribute **extra_skl_attr = &empty_attrs;
        struct attribute **extra_attr = &empty_attrs;
        struct attribute **td_attr    = &empty_attrs;
        struct attribute **mem_attr   = &empty_attrs;
        struct attribute **tsx_attr   = &empty_attrs;
-       struct attribute **to_free = NULL;
        union cpuid10_edx edx;
        union cpuid10_eax eax;
        union cpuid10_ebx ebx;
@@ -4950,8 +4956,7 @@ __init int intel_pmu_init(void)
                x86_pmu.get_event_constraints = hsw_get_event_constraints;
                extra_attr = boot_cpu_has(X86_FEATURE_RTM) ?
                        hsw_format_attr : nhm_format_attr;
-               extra_attr = merge_attr(extra_attr, skl_format_attr);
-               to_free = extra_attr;
+               extra_skl_attr = skl_format_attr;
                td_attr  = hsw_events_attrs;
                mem_attr = hsw_mem_events_attrs;
                tsx_attr = hsw_tsx_events_attrs;
@@ -4989,7 +4994,7 @@ __init int intel_pmu_init(void)
                x86_pmu.get_event_constraints = icl_get_event_constraints;
                extra_attr = boot_cpu_has(X86_FEATURE_RTM) ?
                        hsw_format_attr : nhm_format_attr;
-               extra_attr = merge_attr(extra_attr, skl_format_attr);
+               extra_skl_attr = skl_format_attr;
                mem_attr = icl_events_attrs;
                tsx_attr = icl_tsx_events_attrs;
                x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xca, .umask=0x02);
@@ -5024,6 +5029,7 @@ __init int intel_pmu_init(void)
        group_events_mem.attrs = mem_attr;
        group_events_tsx.attrs = tsx_attr;
        group_format_extra.attrs = extra_attr;
+       group_format_extra_skl.attrs = extra_skl_attr;
 
        x86_pmu.attr_update = attr_update;
 
@@ -5104,7 +5110,6 @@ __init int intel_pmu_init(void)
        if (x86_pmu.counter_freezing)
                x86_pmu.handle_irq = intel_pmu_handle_irq_v4;
 
-       kfree(to_free);
        return 0;
 }
 
-- 
2.20.1

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