On 5/2/2019 12:02 PM, Adrian Hunter wrote:
> Cc: some AMD people
>
> On 1/05/19 8:54 PM, Raul E Rangel wrote:
>> AMD SDHC 0x7906 requires a hard reset to clear all internal state.
>> Otherwise it can get into a bad state where the DATA lines are always
>> read as zeros.
>>
>> This change requires firmware that can transition the device into
>> D3Cold for it to work correctly. If the firmware does not support
>> transitioning to D3Cold then the power state transitions are a no-op.
>>
>> Signed-off-by: Raul E Rangel <rran...@chromium.org>
Signed-off-by: Shyam Sundar S K <shyam-sundar....@amd.com>
