Add the MPLL common register initial setting

Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
 drivers/clk/meson/g12a.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index ef1d2e4c8fd2..d5aceb79a91a 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -2992,10 +2992,16 @@ static struct clk_regmap *const g12a_clk_regmaps[] = {
        &g12a_vdec_hevcf,
 };
 
+static const struct reg_sequence g12a_init_regs[] = {
+       { .reg = HHI_MPLL_CNTL0,        .def = 0x00000543 },
+};
+
 static const struct meson_eeclkc_data g12a_clkc_data = {
        .regmap_clks = g12a_clk_regmaps,
        .regmap_clk_num = ARRAY_SIZE(g12a_clk_regmaps),
-       .hw_onecell_data = &g12a_hw_onecell_data
+       .hw_onecell_data = &g12a_hw_onecell_data,
+       .init_regs = g12a_init_regs,
+       .init_count = ARRAY_SIZE(g12a_init_regs),
 };
 
 static const struct of_device_id clkc_match_table[] = {
-- 
2.20.1

Reply via email to