On 14/05/2019 18:18, Sowjanya Komatineni wrote: >> Subject: Re: [PATCH V5 1/4] spi: tegra114: add support for gpio based CS > >> On 14/05/2019 06:03, Sowjanya Komatineni wrote: >>> This patch adds support for GPIO based CS control through SPI core >>> function spi_set_cs. >>> >>> Signed-off-by: Sowjanya Komatineni <skomatin...@nvidia.com> >> Can you elaborate on the use-case where this is needed? I am curious what >> platforms are using this and why they would not use the dedicated CS signals. >> >> Cheers >> Jon > > Tegra SPI doesn’t support inter byte delay directly to meet some SPI slave > requirements. > So we use GPIO control CS in parallel with a dummy HW CS and use inactive > cycles delay of SPI controller to mimic inter byte delay. > > Currently we don’t have specific SPI slave on upstream supported platforms > but considering raspberry PI header where SPI I/F is exposed to pins it > allows user to connect any SPI slave and this helps for some slaves that need > specific inter byte delay.
Maybe add these details to the commit message so that it is clear what the motivation for this is. Thanks Jon -- nvpublic
