Hi Florian,
Florian Fainelli <f.faine...@gmail.com> wrote on Mon, 20 May 2019
12:11:42 -0700:
> On 5/20/19 12:05 PM, Kamal Dasu wrote:
> > This change supports nand-ecc-step-size and nand-ecc-strength fields in
> > brcmnand DT node to be optional.
> > see: Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> >
> > If both nand-ecc-strength and nand-ecc-step-size are not specified in
> > device tree node for NAND, raw NAND layer does detect ECC information by
> > reading ONFI extended parameter page for parts using ONFI >= 2.1.
> > In case of non-ONFI NAND parts there could be a nand_id table entry with
> > ECC information. If there is valid device tree entry for nand-ecc-strength
> > and nand-ecc-step-size fields it still shall override the detected values.
> >
> > Signed-off-by: Kamal Dasu <kdasu.k...@gmail.com>
> > ---
> > drivers/mtd/nand/raw/brcmnand/brcmnand.c | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> > b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> > index ce0b8ff..a4d2057 100644
> > --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> > +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> > @@ -2144,6 +2144,17 @@ static int brcmnand_setup_dev(struct brcmnand_host
> > *host)
> > return -EINVAL;
> > }
> >
> > + if (chip->ecc.mode != NAND_ECC_NONE &&
> > + (!chip->ecc.size || !chip->ecc.strength)) {
> > + if (chip->base.eccreq.step_size && chip->base.eccreq.strength) {
> > + /* use detected ECC parameters */
> > + chip->ecc.size = chip->base.eccreq.step_size;
> > + chip->ecc.strength = chip->base.eccreq.strength;
> > + pr_info("Using ECC step-size %d, strength %d\n",
> > + chip->ecc.size, chip->ecc.strength);
>
> Nit: should not we use dev_info(&host->pdev->dev) for printing the
> message in case we have multiple NAND controllers on chip, that way we
> can still differentiate them from the prints?
Yes, that would fit what the rest of the driver does. After that I
think the patchset will be ready.
Thanks,
Miquèl
