[PATCH v5 6/8] KVM: x86: Allow Guest to set supported bits in XSS

[Yang Weijiang]

Now that KVM supports setting CET related bits in XSS.
Previously, KVM did not support setting any bits in XSS
so hardcoded its check to inject a #GP if Guest
attempted to write a non-zero value to XSS.

Signed-off-by: Yang Weijiang <weijiang.y...@intel.com>
Co-developed-by: Zhang Yi Z <yi.z.zh...@linux.intel.com>
---
 arch/x86/include/asm/kvm_host.h |  1 +
 arch/x86/kvm/cpuid.c            | 13 ++++++++++---
 arch/x86/kvm/vmx/vmx.c          |  7 ++-----
 3 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 8c3f0ddc7676..035367694056 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -620,6 +620,7 @@ struct kvm_vcpu_arch {
 
        u64 xcr0;
        u64 guest_supported_xcr0;
+       u64 guest_supported_xss;
        u32 guest_xstate_size;
 
        struct kvm_pio_request pio;
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 7be16ef0ea4a..b645a143584f 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -122,9 +122,16 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu)
        }
 
        best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
-       if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
-               best->ebx = xstate_required_size(vcpu->arch.xcr0 |
-                           kvm_supported_xss(), true);
+       if (best) {
+               if (best->eax & (F(XSAVES) | F(XSAVEC)))
+                       best->ebx = xstate_required_size(vcpu->arch.xcr0 |
+                                   kvm_supported_xss(), true);
+
+               vcpu->arch.guest_supported_xss = best->ecx &
+                       kvm_supported_xss();
+       } else {
+               vcpu->arch.guest_supported_xss = 0;
+       }
 
        /*
         * The existing code assumes virtual address is 48-bit or 57-bit in the
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 1c0d487a4037..dec6bda20235 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1945,12 +1945,9 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct 
msr_data *msr_info)
        case MSR_IA32_XSS:
                if (!vmx_xsaves_supported())
                        return 1;
-               /*
-                * The only supported bit as of Skylake is bit 8, but
-                * it is not supported on KVM.
-                */
-               if (data != 0)
+               if (data & ~vcpu->arch.guest_supported_xss)
                        return 1;
+
                vcpu->arch.ia32_xss = data;
                if (vcpu->arch.ia32_xss != host_xss)
                        add_atomic_switch_msr(vmx, MSR_IA32_XSS,
-- 
2.17.2