The VDDEE regulator is basically a copy of the VCCK regulator. VDDEE
supplies for example the Mali GPU and is controlled by PWM_D instead of
PWM_C.

Add the VDDEE PWM regulator and make it the supply of the Mali GPU.

Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>
---
 arch/arm/boot/dts/meson8b-ec100.dts | 31 ++++++++++++++++++++++++++---
 1 file changed, 28 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/meson8b-ec100.dts 
b/arch/arm/boot/dts/meson8b-ec100.dts
index 9bf4249cb60d..61a1265064dc 100644
--- a/arch/arm/boot/dts/meson8b-ec100.dts
+++ b/arch/arm/boot/dts/meson8b-ec100.dts
@@ -219,6 +219,27 @@
                 */
                vin-supply = <&vcc_3v3>;
        };
+
+       vddee: regulator-vddee {
+               /*
+                * Silergy SY8089AAC-GP 2A continuous, 3A peak, 1MHz
+                * Synchronous Step Down Regulator. Also called VDDAO
+                * in a part of the schematics.
+                */
+               compatible = "pwm-regulator";
+
+               regulator-name = "VDDEE";
+               regulator-min-microvolt = <860000>;
+               regulator-max-microvolt = <1140000>;
+
+               vin-supply = <&vcc_5v>;
+
+               pwms = <&pwm_cd 1 1148 0>;
+               pwm-dutycycle-range = <100 0>;
+
+               regulator-boot-on;
+               regulator-always-on;
+       };
 };
 
 &cpu0 {
@@ -268,6 +289,10 @@
        };
 };
 
+&mali {
+       mali-supply = <&vddee>;
+};
+
 &saradc {
        status = "okay";
        vref-supply = <&vcc_1v8>;
@@ -349,10 +374,10 @@
 
 &pwm_cd {
        status = "okay";
-       pinctrl-0 = <&pwm_c1_pins>;
+       pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
        pinctrl-names = "default";
-       clocks = <&clkc CLKID_XTAL>;
-       clock-names = "clkin0";
+       clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>;
+       clock-names = "clkin0", "clkin1";
 };
 
 &rtc {
-- 
2.21.0

Reply via email to