Quoting Paul Cercueil (2019-05-02 14:24:58) > Some clocks provided on Ingenic SoCs have dividers, whose hardware value > as written in the register cannot be expressed as an affine function > to the actual divider value. > > For instance, for the CPU clock on the JZ4770, the dividers are coded as > follows: > > ------------------
Applied to clk-next
