The SR-IOV specification requires both PFs and VFs to implement a PCIe
capability. Generally this is sufficient to assume extended config
space is present, but we generally also perform additional tests to
make sure the extended config space is reachable and not simply an
alias of standard config space. For a VF to exist extended config
space must be accessible on the PF, therefore we can also assume it to
be accessible on the VF. This enables a micro performance
optimization previously implemented in commit 975bb8b4dc93 ("PCI/IOV:
Use VF0 cached config space size for other VFs") to speed up probing
of VFs.
Cc: KarimAllah Ahmed <karah...@amazon.de>
Cc: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppusw...@linux.intel.com>
Cc: Hao Zheng <yi...@linux.alibaba.com>
Signed-off-by: Alex Williamson <alex.william...@redhat.com>
---
drivers/pci/probe.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index a3a3c6b28343..439244ff8f09 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1561,6 +1561,21 @@ int pci_cfg_space_size(struct pci_dev *dev)
u32 status;
u16 class;
+#ifdef CONFIG_PCI_IOV
+ /*
+ * Per the SR-IOV specification (rev 1.1, sec 3.5), VFs are required to
+ * implement a PCIe capability and therefore must implement extended
+ * config space. We can skip the NO_EXTCFG test below and the
+ * reachability/aliasing test in pci_cfg_space_size_ext() by virtue of
+ * the fact that the SR-IOV capability on the PF resides in extended
+ * config space and must be accessible and non-aliased to have enabled
+ * support for this VF. This is a micro performance optimization for
+ * systems supporting many VFs.
+ */
+ if (dev->is_virtfn)
+ return PCI_CFG_SPACE_EXP_SIZE;
+#endif
+
if (dev->bus->bus_flags & PCI_BUS_FLAGS_NO_EXTCFG)
return PCI_CFG_SPACE_SIZE;
