Hi Enric,
On Tue, Jun 18, 2019 at 10:21:52AM +0200, Enric Balletbo i Serra wrote:
> Hi Matthias,
>
> On 15/6/19 0:45, Matthias Kaehlcke wrote:
> > This reverts commit 288ceb85b505c19abe1895df068dda5ed20cf482.
> >
> > According to the commit message the AUO B101EAN01 panel on minnie
> > requires a PWM delay of 200 ms, however this is not what the
> > datasheet says. The datasheet mentions a *max* delay of 200 ms
> > for T2 ("delay from LCDVDD to black video generation") and T3
> > ("delay from LCDVDD to HPD high"), which aren't related to the
> > PWM. The backlight power sequence does not specify min/max
> > constraints for T15 (time from PWM on to BL enable) or T16
> > (time from BL disable to PWM off).
> >
>
> Could you point from where the confusion comes from? I think will be helpful
> for
> the record. B101EAN01.8 vs B101EAN01.1
sounds good
> > Signed-off-by: Matthias Kaehlcke <m...@chromium.org>
>
> With the above added:
>
> Reviewed-by: Enric Balletbo i Serra <enric.balle...@collabora.com>
Thanks!
