Hi Boris,

> -----Original Message-----
> From: Boris Brezillon <[email protected]>
> Sent: Wednesday, June 26, 2019 4:57 PM
> To: Naga Sureshkumar Relli <[email protected]>
> Cc: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected]; linux-
> [email protected]; [email protected]
> Subject: Re: [LINUX PATCH v17 1/2] mtd: rawnand: nand_micron: Do not over 
> write
> driver's read_page()/write_page()
> 
> On Wed, 26 Jun 2019 11:22:33 +0000
> Naga Sureshkumar Relli <[email protected]> wrote:
> 
> > Hi Boris,
> >
> > > -----Original Message-----
> > > From: Boris Brezillon <[email protected]>
> > > Sent: Wednesday, June 26, 2019 12:18 PM
> > > To: Naga Sureshkumar Relli <[email protected]>
> > > Cc: [email protected]; [email protected];
> > > [email protected]; [email protected]; [email protected];
> > > [email protected]; [email protected]; [email protected];
> > > [email protected]; linux- [email protected];
> > > [email protected]
> > > Subject: Re: [LINUX PATCH v17 1/2] mtd: rawnand: nand_micron: Do not
> > > over write driver's read_page()/write_page()
> > >
> > > On Mon, 24 Jun 2019 22:46:29 -0600
> > > Naga Sureshkumar Relli <[email protected]> wrote:
> > >
> > > > Add check before assigning chip->ecc.read_page() and
> > > > chip->ecc.write_page()
> > > >
> > > > Signed-off-by: Naga Sureshkumar Relli
> > > > <[email protected]>
> > > > ---
> > > >  drivers/mtd/nand/raw/nand_micron.c | 7 +++++--
> > > >  1 file changed, 5 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/mtd/nand/raw/nand_micron.c
> > > > b/drivers/mtd/nand/raw/nand_micron.c
> > > > index cbd4f09ac178..565f2696c747 100644
> > > > --- a/drivers/mtd/nand/raw/nand_micron.c
> > > > +++ b/drivers/mtd/nand/raw/nand_micron.c
> > > > @@ -500,8 +500,11 @@ static int micron_nand_init(struct nand_chip *chip)
> > > >                 chip->ecc.size = 512;
> > > >                 chip->ecc.strength = chip->base.eccreq.strength;
> > > >                 chip->ecc.algo = NAND_ECC_BCH;
> > > > -               chip->ecc.read_page = micron_nand_read_page_on_die_ecc;
> > > > -               chip->ecc.write_page = 
> > > > micron_nand_write_page_on_die_ecc;
> > > > +               if (!chip->ecc.read_page)
> > > > +                       chip->ecc.read_page = 
> > > > micron_nand_read_page_on_die_ecc;
> > > > +
> > > > +               if (!chip->ecc.write_page)
> > > > +                       chip->ecc.write_page = 
> > > > micron_nand_write_page_on_die_ecc;
> > >
> > > That's wrong, if you don't want on-die ECC to be used, simply don't
> > > set nand-ecc-mode to "on- die".
> > Ok. But if we want to use on-die ECC then you mean to say it is mandatory 
> > to use
> micron_nand_read/write_page_on_die_ecc()?
> 
> Absolutely, and if it doesn't work that means you driver does not
> implement raw accesses correctly, which means it's still buggy...
I agree. But let's say, if there is a limitation with the controller. Then it 
is must to have this check right?
I mean, for pl353 controller, we must clear the CS during the data phase, hence 
we are splitting the 
Transfer in the pl353_read/write_page_raw().
+       pl353_nand_read_data_op(chip, buf, mtd->writesize, false);
+       p = chip->oob_poi;
+       pl353_nand_read_data_op(chip, p,
+                               (mtd->oobsize -
+                               PL353_NAND_LAST_TRANSFER_LENGTH), false);
+       p += (mtd->oobsize - PL353_NAND_LAST_TRANSFER_LENGTH);
+       xnfc->dataphase_addrflags |= PL353_NAND_CLEAR_CS;
+       pl353_nand_read_data_op(chip, p, PL353_NAND_LAST_TRANSFER_LENGTH,
+                               false);
As the above sequence is needed even for raw access, PL353 is unable to use the 
on_die_page reads.

Thanks,
Naga Sureshkumar Relli

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