On Sun, Jul 14, 2019 at 06:16:49PM +0000, Randy Dunlap wrote: > On 5/8/19 7:44 AM, Kirill A. Shutemov wrote: > > From: Alison Schofield <alison.schofi...@intel.com> > > > > Provide an overview of MKTME on Intel Platforms. > > > > Signed-off-by: Alison Schofield <alison.schofi...@intel.com> > > Signed-off-by: Kirill A. Shutemov <kirill.shute...@linux.intel.com> > > --- > > Documentation/x86/mktme/index.rst | 8 +++ > > Documentation/x86/mktme/mktme_overview.rst | 57 ++++++++++++++++++++++ > > 2 files changed, 65 insertions(+) > > create mode 100644 Documentation/x86/mktme/index.rst > > create mode 100644 Documentation/x86/mktme/mktme_overview.rst > > > > diff --git a/Documentation/x86/mktme/mktme_overview.rst > > b/Documentation/x86/mktme/mktme_overview.rst > > new file mode 100644 > > index 000000000000..59c023965554 > > --- /dev/null > > +++ b/Documentation/x86/mktme/mktme_overview.rst > > @@ -0,0 +1,57 @@ > > +Overview > > +========= > ... > > +-- > > +1. > > https://software.intel.com/sites/default/files/managed/a5/16/Multi-Key-Total-Memory-Encryption-Spec.pdf > > +2. The MKTME architecture supports up to 16 bits of KeyIDs, so a > > + maximum of 65535 keys on top of the “TME key” at KeyID-0. The > > + first implementation is expected to support 5 bits, making 63 > > Hi, > How do 5 bits make 63 keys available?
Yep, typo. It has to be 6 bits. Alison, please correct this. -- Kirill A. Shutemov
