[PATCH AUTOSEL 5.2 118/171] PCI: mobiveil: Fix the Class Code field

[Sasha Levin]

From: Hou Zhiqiang <zhiqiang....@nxp.com>

[ Upstream commit 0122af0a08243f344a438f924e5c2486486555b3 ]

Fix up the Class Code field in PCI configuration space and set it to
PCI_CLASS_BRIDGE_PCI.

Move the Class Code fixup to function mobiveil_host_init() where
it belongs.

Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang <zhiqiang....@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieral...@arm.com>
Reviewed-by: Minghuan Lian <minghuan.l...@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahma...@mobiveil.co.in>
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 drivers/pci/controller/pcie-mobiveil.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/controller/pcie-mobiveil.c 
b/drivers/pci/controller/pcie-mobiveil.c
index 03d697b63e2a..88e9b70081fc 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -558,6 +558,12 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
                }
        }
 
+       /* fixup for PCIe class register */
+       value = csr_readl(pcie, PAB_INTP_AXI_PIO_CLASS);
+       value &= 0xff;
+       value |= (PCI_CLASS_BRIDGE_PCI << 16);
+       csr_writel(pcie, value, PAB_INTP_AXI_PIO_CLASS);
+
        /* setup MSI hardware registers */
        mobiveil_pcie_enable_msi(pcie);
 
@@ -798,9 +804,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
                goto error;
        }
 
-       /* fixup for PCIe class register */
-       csr_writel(pcie, 0x060402ab, PAB_INTP_AXI_PIO_CLASS);
-
        /* initialize the IRQ domains */
        ret = mobiveil_pcie_init_irq_domain(pcie);
        if (ret) {
-- 
2.20.1