[PATCH 5.1 307/371] arm64: irqflags: Add condition flags to inline asm clobber list

[Greg Kroah-Hartman]

From: Julien Thierry <julien.thie...@arm.com>

commit f57065782f245ca96f1472209a485073bbc11247 upstream.

Some of the inline assembly instruction use the condition flags and need
to include "cc" in the clobber list.

Fixes: 4a503217ce37 ("arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking")
Cc: <sta...@vger.kernel.org> # 5.1.x-
Suggested-by: Marc Zyngier <marc.zyng...@arm.com>
Cc: Will Deacon <will.dea...@arm.com>
Reviewed-by: Marc Zyngier <marc.zyng...@arm.com>
Acked-by: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Julien Thierry <julien.thie...@arm.com>
Signed-off-by: Catalin Marinas <catalin.mari...@arm.com>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>

---
 arch/arm64/include/asm/irqflags.h |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

--- a/arch/arm64/include/asm/irqflags.h
+++ b/arch/arm64/include/asm/irqflags.h
@@ -92,7 +92,7 @@ static inline unsigned long arch_local_s
                        ARM64_HAS_IRQ_PRIO_MASKING)
                : "=&r" (flags), "+r" (daif_bits)
                : "r" ((unsigned long) GIC_PRIO_IRQOFF)
-               : "memory");
+               : "cc", "memory");
 
        return flags;
 }
@@ -136,7 +136,7 @@ static inline int arch_irqs_disabled_fla
                        ARM64_HAS_IRQ_PRIO_MASKING)
                : "=&r" (res)
                : "r" ((int) flags)
-               : "memory");
+               : "cc", "memory");
 
        return res;
 }