On Fri, Jul 26, 2019 at 08:40:43PM +0200, Jernej Skrabec wrote:
> Now that sun4i PWM driver supports deasserting reset line and enabling
> bus clock, support for H6 PWM can be added.
>
> Note that while H6 PWM has two channels, only first one is wired to
> output pin. Second channel is used as a clock source to companion AC200
> chip which is bundled into same package.
>
> Signed-off-by: Jernej Skrabec <jernej.skra...@siol.net>
> ---
> drivers/pwm/pwm-sun4i.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
> index 7d3ac3f2dc3f..9e0eca79ff88 100644
> --- a/drivers/pwm/pwm-sun4i.c
> +++ b/drivers/pwm/pwm-sun4i.c
> @@ -331,6 +331,13 @@ static const struct sun4i_pwm_data
> sun4i_pwm_single_bypass = {
> .npwm = 1,
> };
>
> +static const struct sun4i_pwm_data sun50i_pwm_dual_bypass_clk_rst = {
> + .has_bus_clock = true,
> + .has_prescaler_bypass = true,
> + .has_reset = true,
> + .npwm = 2,
> +};
> +
> static const struct of_device_id sun4i_pwm_dt_ids[] = {
> {
> .compatible = "allwinner,sun4i-a10-pwm",
> @@ -347,6 +354,9 @@ static const struct of_device_id sun4i_pwm_dt_ids[] = {
> }, {
> .compatible = "allwinner,sun8i-h3-pwm",
> .data = &sun4i_pwm_single_bypass,
> + }, {
> + .compatible = "allwinner,sun50i-h6-pwm",
> + .data = &sun50i_pwm_dual_bypass_clk_rst,
If you follow my suggestion for the two previous patches, you can just
use:
compatible = "allwinner,sun50i-h6-pwm", "allwinner,sun5i-a10s-pwm";
and drop this patch.
Best regards
Uwe
> }, {
> /* sentinel */
> },
> --
> 2.22.0
>
>
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
