From: YueHaibing <yuehaib...@huawei.com> commit 3d139703d397f6281368047ba7ad1c8bf95aa8ab upstream.
If BITREVERSE is m and FPGA_MGR_ALTERA_PS_SPI is y, build fails: drivers/fpga/altera-ps-spi.o: In function `altera_ps_write': altera-ps-spi.c:(.text+0x4ec): undefined reference to `byte_rev_table' Select BITREVERSE to fix this. Reported-by: Hulk Robot <hul...@huawei.com> Fixes: fcfe18f885f6 ("fpga-manager: altera-ps-spi: use bitrev8x4") Signed-off-by: YueHaibing <yuehaib...@huawei.com> Cc: stable <sta...@vger.kernel.org> Acked-by: Moritz Fischer <m...@kernel.org> Link: https://lore.kernel.org/r/20190708071356.50928-1-yuehaib...@huawei.com Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org> --- drivers/fpga/Kconfig | 1 + 1 file changed, 1 insertion(+) --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -40,6 +40,7 @@ config ALTERA_PR_IP_CORE_PLAT config FPGA_MGR_ALTERA_PS_SPI tristate "Altera FPGA Passive Serial over SPI" depends on SPI + select BITREVERSE help FPGA manager driver support for Altera Arria/Cyclone/Stratix using the passive serial interface over SPI.