[PATCH v8 13/14] arm64: dts: rockchip: add rx0 mipi-phy for rk3399

[Helen Koike]

From: Shunqian Zheng <zhen...@rock-chips.com>

It's a Designware MIPI D-PHY, used for ISP0 in rk3399.

Signed-off-by: Shunqian Zheng <zhen...@rock-chips.com>
Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
[update for upstream]
Signed-off-by: Helen Koike <helen.ko...@collabora.com>

---

Changes in v8: None
Changes in v7:
- add phy-cells

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 776d2bd48c06..3630d95e5cd8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1385,6 +1385,17 @@
                        status = "disabled";
                };
 
+               mipi_dphy_rx0: mipi-dphy-rx0 {
+                       compatible = "rockchip,rk3399-mipi-dphy";
+                       clocks = <&cru SCLK_MIPIDPHY_REF>,
+                               <&cru SCLK_DPHY_RX0_CFG>,
+                               <&cru PCLK_VIO_GRF>;
+                       clock-names = "dphy-ref", "dphy-cfg", "grf";
+                       power-domains = <&power RK3399_PD_VIO>;
+                       #phy-cells = <0>;
+                       status = "disabled";
+               };
+
                u2phy0: usb2-phy@e450 {
                        compatible = "rockchip,rk3399-usb2phy";
                        reg = <0xe450 0x10>;
-- 
2.22.0