The yaml documentation description of isa strings section doesn't
specify anything about the case sensitiveness of the isa strings.
The RISC-V specification clearly specifies it to be case insensitive.
However, Linux kernel supports only lower case isa strings.
Update the yaml documentation accordingly to avoid any confusion.
Signed-off-by: Atish Patra <atish.pa...@wdc.com>
---
Documentation/devicetree/bindings/riscv/cpus.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml
b/Documentation/devicetree/bindings/riscv/cpus.yaml
index c899111aa5e3..e22a2b7ebafa 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -46,10 +46,14 @@ properties:
- rv64imafdc
description:
Identifies the specific RISC-V instruction set architecture
- supported by the hart. These are documented in the RISC-V
+ supported by the hart. These are documented in the RISC-V
User-Level ISA document, available from
https://riscv.org/specifications/
+ Linux kernel only supports lower case isa strings. Thus,
+ isa strings must be specified in lower case in device tree
+ as well.
+
timebase-frequency:
type: integer
minimum: 1
--
2.21.0
